“SGI hopes to bring a massive performance boost to its supercomputers through highly parallel processors based on Intel’s MIC (many integrated cores) architecture,” said Eng Lim Goh, CTO at SGI. In conjunction with Xeon server CPUs, the MIC chips will run millions of threads in parallel, which will help scale supercomputer performance.
Chips based on the MIC architecture mix standard x86 cores with specialised cores to boost high-performance computing. Today’s fastest supercomputers top out at around 2.5 petaflops (2.5 thousand trillion calculations per second), but efforts to improve throughput and on-chip performance are under way. IBM, for example, said it will use pulses of light to accelerate data transfers between chips. These and other measures could lead to supercomputers that can deliver performance of over one exaflop, or 1000 petaflops, by 2020.
The MIC architecture is viewed as Intel’s answer to GPUs from companies like Nvidia and Advanced Micro Devices, which pack hundreds of computing cores. The world’s fastest supercomputer, the Tianhe-1A supercomputer in China, incorporates thousands of Intel CPU cores and Nvidia graphics chips to reach a sustained performance of 2.5 petaflops, and peak performance of 4.7 petaflops.
Intel showed its first experimental MIC chip, code-named Knights Ferry, in June last year. The chip sits in a PCI-Express slot. It has 32 cores and combines vector processing units with standard CPU cores. Though not commercially released, chip samples have shipped out in small numbers to organisations now writing programs around the architecture.